diff options
Diffstat (limited to 'asm/intel64')
| -rw-r--r-- | asm/intel64/all_ops.h | 1 | ||||
| -rw-r--r-- | asm/intel64/movsx.cpp | 116 | ||||
| -rw-r--r-- | asm/intel64/movsx.h | 31 |
3 files changed, 148 insertions, 0 deletions
diff --git a/asm/intel64/all_ops.h b/asm/intel64/all_ops.h index 75b28f9..fc38b3f 100644 --- a/asm/intel64/all_ops.h +++ b/asm/intel64/all_ops.h @@ -16,6 +16,7 @@ #include "neg.h" #include "not.h" #include "mov.h" +#include "movsx.h" #include "mul.h" #include "or.h" #include "pop.h" diff --git a/asm/intel64/movsx.cpp b/asm/intel64/movsx.cpp new file mode 100644 index 0000000..9dd1ec8 --- /dev/null +++ b/asm/intel64/movsx.cpp @@ -0,0 +1,116 @@ +#include "movsx.h" + +#include "codes.h" + +#include <asm/assembler.h> +#include <asm/operators.h> + +#include <asm/intel64/codes.h> + +using namespace std::string_literals; + +Op_movsx::Op_movsx(const Asm::Args& args) +{ + if (args[0].type() == typeid(Asm::Args::Register16) && args[1].type() == typeid(Asm::Args::Register8)) { // movsx reg16, reg8 + machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBE } + + ModRM(std::any_cast<Asm::Args::Register16>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register8)) { // movsx reg32, reg8 + machine_code = std::vector<uint8_t>{ 0x0F, 0xBE } + + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register8)) { // movsx reg64, reg8 + machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBE } + + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register16)) { // movsx reg32, reg16 + machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBF } + + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), std::any_cast<Asm::Args::Register16>(args[1]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register16)) { // movsx reg64, reg16 + machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBF } + + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Register16>(args[1]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register32)) { // movsx reg64, reg32 + machine_code = REX("W") + std::vector<uint8_t>{ 0x63 } + + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Register32>(args[1]).name()); + + + } else if (args[0].type() == typeid(Asm::Args::Register16) && args[1].type() == typeid(Asm::Args::Mem8Ptr64)) { // movsx reg16, byte ptr [reg64] + Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[1])}; + machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBE } + + ModRM(std::any_cast<Asm::Args::Register16>(args[0]).name(), ptr.reg(), ptr.offs()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem8Ptr64)) { // movsx reg32, byte ptr [reg64] + Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[1])}; + machine_code = std::vector<uint8_t>{ 0x0F, 0xBE } + + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), ptr.reg(), ptr.offs()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem8Ptr64)) { // movsx reg64, byte ptr [reg64] + Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[1])}; + machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBE } + + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem16Ptr64)) { // movsx reg32, word ptr [reg64] + Asm::Args::Mem16Ptr64 ptr{std::any_cast<Asm::Args::Mem16Ptr64>(args[1])}; + machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBF } + + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), ptr.reg(), ptr.offs()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem16Ptr64)) { // movsx reg64, word ptr [reg64] + Asm::Args::Mem16Ptr64 ptr{std::any_cast<Asm::Args::Mem16Ptr64>(args[1])}; + machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBF } + + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem32Ptr64)) { // movsx reg64, dword ptr [reg64] + Asm::Args::Mem32Ptr64 ptr{std::any_cast<Asm::Args::Mem32Ptr64>(args[1])}; + machine_code = REX("W") + std::vector<uint8_t>{ 0x63 } + + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs()); + + + } else { + throw std::runtime_error("Unimplemented: movsx "s + args[0].type().name() + " "s + args[1].type().name()); + } +} + +namespace { + +bool registered { + registerOp(mangleName<Asm::Args::Register16, Asm::Args::Register8>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register32, Asm::Args::Register8>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register8>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register32, Asm::Args::Register16>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register16>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register32>("movsxd"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register16, Asm::Args::Mem8Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem8Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem8Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem16Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem16Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem32Ptr64>("movsxd"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_movsx>(args); + }) +}; + +} diff --git a/asm/intel64/movsx.h b/asm/intel64/movsx.h new file mode 100644 index 0000000..a31f538 --- /dev/null +++ b/asm/intel64/movsx.h @@ -0,0 +1,31 @@ +// Move With Sign-Extension + +#pragma once + +#include <asm/assembler.h> + +class Op_movsx: public Op +{ +public: + Op_movsx(const Asm::Args& args); + +public: + std::vector<uint8_t> getCode() override + { + return machine_code; + } + + size_t size() override + { + return machine_code.size(); + } + + bool optimize() override ///< returns true if changed + { + return false; + } + +protected: + std::vector<uint8_t> machine_code; +}; + |