From 1937e301b6cd185c8ce907b9184142e82e76fda4 Mon Sep 17 00:00:00 2001 From: Roland Reichwein Date: Wed, 18 Nov 2020 18:10:42 +0100 Subject: Implemented asm or --- Makefile | 5 ++- asm/intel64/all_ops.h | 1 + asm/intel64/or.cpp | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++ asm/intel64/or.h | 31 +++++++++++++++++++ 4 files changed, 120 insertions(+), 1 deletion(-) create mode 100644 asm/intel64/or.cpp create mode 100644 asm/intel64/or.h diff --git a/Makefile b/Makefile index c2d1850..75df413 100644 --- a/Makefile +++ b/Makefile @@ -62,6 +62,7 @@ PROGSRC=\ asm/intel64/mul.cpp \ asm/intel64/neg.cpp \ asm/intel64/not.cpp \ + asm/intel64/or.cpp \ asm/intel64/pop.cpp \ asm/intel64/push.cpp \ asm/intel64/rcl.cpp \ @@ -111,7 +112,9 @@ TESTSRC=\ SRC=$(PROGSRC) mcc.cpp -all: mcc unittest systemtest +all: mcc + +test: unittest systemtest # Tests on C++ level unittest: test-$(PROJECTNAME) diff --git a/asm/intel64/all_ops.h b/asm/intel64/all_ops.h index 4da0a0b..89313b2 100644 --- a/asm/intel64/all_ops.h +++ b/asm/intel64/all_ops.h @@ -15,6 +15,7 @@ #include "not.h" #include "mov.h" #include "mul.h" +#include "or.h" #include "pop.h" #include "push.h" #include "rcl.h" diff --git a/asm/intel64/or.cpp b/asm/intel64/or.cpp new file mode 100644 index 0000000..c5be55c --- /dev/null +++ b/asm/intel64/or.cpp @@ -0,0 +1,84 @@ +#include "or.h" + +#include "codes.h" + +#include +#include + +#include + +using namespace std::string_literals; + +Op_or::Op_or(const Asm::Args& args) +{ + if (args[0].type() == typeid(Asm::Args::Register8) && args[1].type() == typeid(Asm::Args::Register8)) { // or reg8, reg8 + // r/m8, r8: ModRM:r/m (w), ModRM:reg (r) + machine_code = std::vector{ 0x08 } + + ModRM(std::any_cast(args[1]).name(), std::any_cast(args[0]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register32)) { // or reg32, reg32 + // r/m32, r32: ModRM:r/m (w), ModRM:reg (r) + machine_code = std::vector{ 0x09 } + + ModRM(std::any_cast(args[1]).name(), std::any_cast(args[0]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register64)) { // or reg64, reg64 + // r/m64, r64: ModRM:r/m (w), ModRM:reg (r) + machine_code = REX("W") + std::vector{ 0x09 } + + ModRM(std::any_cast(args[1]).name(), std::any_cast(args[0]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Immediate32)) { // or reg32, imm32 + machine_code = std::vector{ 0x81 } + ModRM("/1", std::any_cast(args[0]).name()) + std::any_cast(args[1]).getCode(); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem32Ptr64)) { // or reg32, [reg64] + machine_code = std::vector{ 0x0B } + ModRM(std::any_cast(args[0]).name(), std::any_cast(args[1]).reg()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem64Ptr64)) { // or reg64, [reg64] + machine_code = REX("W") + std::vector{ 0x0B } + ModRM(std::any_cast(args[0]).name(), std::any_cast(args[1]).reg()); + + } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64) && args[1].type() == typeid(Asm::Args::Register32)) { // or [reg64], reg32 + machine_code = std::vector{ 0x09 } + ModRM(std::any_cast(args[1]).name(), std::any_cast(args[0]).reg()); + + } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Register64)) { // or [reg64], reg64 + machine_code = REX("W") + std::vector{ 0x09 } + ModRM(std::any_cast(args[1]).name(), std::any_cast(args[0]).reg()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // or reg64, imm32 (sign-extended) + machine_code = REX("W") + std::vector{ 0x81 } + ModRM("/1", std::any_cast(args[0]).name()) + std::any_cast(args[1]).getCode(); + + } else { + throw std::runtime_error("Unimplemented: or "s + args[0].type().name() + " "s + args[1].type().name()); + } +} + +namespace { + +bool registered { + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) && + registerOp(mangleName("or"), [](const Asm::Args& args) -> std::shared_ptr{ + return std::make_shared(args); + }) +}; + +} diff --git a/asm/intel64/or.h b/asm/intel64/or.h new file mode 100644 index 0000000..3362634 --- /dev/null +++ b/asm/intel64/or.h @@ -0,0 +1,31 @@ +// OR + +#pragma once + +#include + +class Op_or: public Op +{ +public: + Op_or(const Asm::Args& args); + +public: + std::vector getCode() override + { + return machine_code; + } + + size_t size() override + { + return machine_code.size(); + } + + bool optimize() override ///< returns true if changed + { + return false; + } + +protected: + std::vector machine_code; +}; + -- cgit v1.2.3