From 8f28495ab9a8ebf53868405541e907394895e51f Mon Sep 17 00:00:00 2001 From: Roland Reichwein Date: Sat, 17 Oct 2020 21:45:37 +0200 Subject: Add add --- asm/intel64/add.cpp | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 asm/intel64/add.cpp (limited to 'asm/intel64/add.cpp') diff --git a/asm/intel64/add.cpp b/asm/intel64/add.cpp new file mode 100644 index 0000000..dc5c704 --- /dev/null +++ b/asm/intel64/add.cpp @@ -0,0 +1,31 @@ +#include "add.h" + +#include "codes.h" + +#include +#include + +using namespace std::string_literals; + +Op_add::Op_add(AsmArgs& args) +{ + if (args[0].type() == typeid(Register32) && std::any_cast(args[0]).name() == "eax" && args[1].type() == typeid(Immediate32)) { // add eax, imm32 + machine_code = std::vector{ 0x05 } + std::any_cast(args[1]).getCode(); + } else if (args[0].type() == typeid(Register64) && std::any_cast(args[0]).name() == "rax" && args[1].type() == typeid(Immediate32)) { // add rax, imm32 + machine_code = REX("W") + std::vector{ 0x05 } + std::any_cast(args[1]).getCode(); + } else { + throw std::runtime_error("Unimplemented: add "s + args[0].type().name() + " "s + args[1].type().name()); + } +} + +namespace { + +bool registered0 { registerOp(mangleName("add"), [](AsmArgs& args) -> std::shared_ptr{ + return std::make_shared(args); + }) }; +// TODO +bool registered1 { registerOp(mangleName("add"), [](AsmArgs& args) -> std::shared_ptr{ + return std::make_shared(args); + }) }; + +} -- cgit v1.2.3