From 39bccce4fdd1d5ebe312321c963e0325e4d696c5 Mon Sep 17 00:00:00 2001
From: Roland Reichwein <mail@reichwein.it>
Date: Sat, 21 Nov 2020 21:38:56 +0100
Subject: Bugfixing of stack (WIP)

---
 asm/intel64/div.cpp | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

(limited to 'asm/intel64/div.cpp')

diff --git a/asm/intel64/div.cpp b/asm/intel64/div.cpp
index 1e98b7b..cfe2503 100644
--- a/asm/intel64/div.cpp
+++ b/asm/intel64/div.cpp
@@ -21,14 +21,17 @@ Op_div::Op_div(const Asm::Args& args)
   machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } +
    ModRM("/6", std::any_cast<Asm::Args::Register64>(args[0]).name());
  } else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64)) { // div byte ptr [reg64] (accu is al (remainder=ah) <- ah / x)
+  Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[0])};
   machine_code = std::vector<uint8_t>{ 0xF6 } +
-   ModRM("/6", std::any_cast<Asm::Args::Mem8Ptr64>(args[0]).reg());
+   ModRM("/6", ptr.reg(), ptr.offs());
  } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64)) { // div dword ptr [reg64] (accu is eax (remainder=edx) <- edx:eax / x)
+  Asm::Args::Mem32Ptr64 ptr{std::any_cast<Asm::Args::Mem32Ptr64>(args[0])};
   machine_code = std::vector<uint8_t>{ 0xF7 } +
-   ModRM("/6", std::any_cast<Asm::Args::Mem32Ptr64>(args[0]).reg());
+   ModRM("/6", ptr.reg(), ptr.offs());
  } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64)) { // div qword ptr [reg64] (accu is rax (remainder=rdx) <- rdx:rax / x)
+  Asm::Args::Mem64Ptr64 ptr{std::any_cast<Asm::Args::Mem64Ptr64>(args[0])};
   machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } +
-   ModRM("/6", std::any_cast<Asm::Args::Mem64Ptr64>(args[0]).reg());
+   ModRM("/6", ptr.reg(), ptr.offs());
  } else {
   throw std::runtime_error("Unimplemented: div "s + args[0].type().name());
  }
-- 
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