From 5c0611b998e039c8547cfa3841da3567e13446a8 Mon Sep 17 00:00:00 2001 From: Roland Reichwein Date: Thu, 19 Nov 2020 22:31:33 +0100 Subject: Add assembler parser (WIP) --- asm/intel64/encode.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'asm/intel64/encode.cpp') diff --git a/asm/intel64/encode.cpp b/asm/intel64/encode.cpp index 21b6629..51ca7a0 100644 --- a/asm/intel64/encode.cpp +++ b/asm/intel64/encode.cpp @@ -133,18 +133,18 @@ void Asm::toMachineCode(const FlowGraph::Graph& graph, Segment& segment) if (op.type() == FlowGraph::UnaryOperationType::BitwiseNot) { segment.push_back(makeLoadValue(operands[1], graph)); - segment.push_back(parseAsm("not eax")); + segment.append(parseAsm("not eax")); segment.push_back(makeStoreValue(operands[0], graph)); } else if (op.type() == FlowGraph::UnaryOperationType::LogicalNot) { segment.push_back(makeLoadValue(operands[1], graph)); - segment.push_back(parseAsm("bsr eax")); // ZF=1 iff eax=0 - segment.push_back(parseAsm("lahf")); // ZF in AH bit 6 - segment.push_back(parseAsm("shr eax, 14")); // ZF in eax bit 0 - segment.push_back(parseAsm("and eax, 1")); // now, 0 or 1 is in eax, negated because of zero flag + segment.append(parseAsm("bsr eax")); // ZF=1 iff eax=0 + segment.append(parseAsm("lahf")); // ZF in AH bit 6 + segment.append(parseAsm("shr eax, 14")); // ZF in eax bit 0 + segment.append(parseAsm("and eax, 1")); // now, 0 or 1 is in eax, negated because of zero flag segment.push_back(makeStoreValue(operands[0], graph)); } else if (op.type() == FlowGraph::UnaryOperationType::Minus) { segment.push_back(makeLoadValue(operands[1], graph)); - segment.push_back(parseAsm("neg eax")); + segment.append(parseAsm("neg eax")); segment.push_back(makeStoreValue(operands[0], graph)); } else throw std::runtime_error("ICE: Asm: Unsupported unary operation type: "s + std::to_string(static_cast(op.type()))); -- cgit v1.2.3