From a632cce380a853f5400111e19e1380982ed8a7fd Mon Sep 17 00:00:00 2001
From: Roland Reichwein <mail@reichwein.it>
Date: Sat, 28 Nov 2020 12:38:49 +0100
Subject: Implemented MOVSX - Move With Sign-Extension

---
 asm/intel64/movsx.cpp | 116 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 116 insertions(+)
 create mode 100644 asm/intel64/movsx.cpp

(limited to 'asm/intel64/movsx.cpp')

diff --git a/asm/intel64/movsx.cpp b/asm/intel64/movsx.cpp
new file mode 100644
index 0000000..9dd1ec8
--- /dev/null
+++ b/asm/intel64/movsx.cpp
@@ -0,0 +1,116 @@
+#include "movsx.h"
+
+#include "codes.h"
+
+#include <asm/assembler.h>
+#include <asm/operators.h>
+
+#include <asm/intel64/codes.h>
+
+using namespace std::string_literals;
+
+Op_movsx::Op_movsx(const Asm::Args& args)
+{
+ if (args[0].type() == typeid(Asm::Args::Register16) && args[1].type() == typeid(Asm::Args::Register8)) { // movsx reg16, reg8
+  machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBE } +
+   ModRM(std::any_cast<Asm::Args::Register16>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register8)) { // movsx reg32, reg8
+  machine_code = std::vector<uint8_t>{ 0x0F, 0xBE } +
+   ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register8)) { // movsx reg64, reg8
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBE } +
+   ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register16)) { // movsx reg32, reg16
+  machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBF } +
+   ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), std::any_cast<Asm::Args::Register16>(args[1]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register16)) { // movsx reg64, reg16
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBF } +
+   ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Register16>(args[1]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register32)) { // movsx reg64, reg32
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x63 } +
+   ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Register32>(args[1]).name());
+
+
+ } else if (args[0].type() == typeid(Asm::Args::Register16) && args[1].type() == typeid(Asm::Args::Mem8Ptr64)) { // movsx reg16, byte ptr [reg64]
+  Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[1])};
+  machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBE } +
+   ModRM(std::any_cast<Asm::Args::Register16>(args[0]).name(), ptr.reg(), ptr.offs());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem8Ptr64)) { // movsx reg32, byte ptr [reg64]
+  Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[1])};
+  machine_code = std::vector<uint8_t>{ 0x0F, 0xBE } +
+   ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), ptr.reg(), ptr.offs());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem8Ptr64)) { // movsx reg64, byte ptr [reg64]
+  Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[1])};
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBE } +
+   ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem16Ptr64)) { // movsx reg32, word ptr [reg64]
+  Asm::Args::Mem16Ptr64 ptr{std::any_cast<Asm::Args::Mem16Ptr64>(args[1])};
+  machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x0F, 0xBF } +
+   ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), ptr.reg(), ptr.offs());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem16Ptr64)) { // movsx reg64, word ptr [reg64]
+  Asm::Args::Mem16Ptr64 ptr{std::any_cast<Asm::Args::Mem16Ptr64>(args[1])};
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x0F, 0xBF } +
+   ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem32Ptr64)) { // movsx reg64, dword ptr [reg64]
+  Asm::Args::Mem32Ptr64 ptr{std::any_cast<Asm::Args::Mem32Ptr64>(args[1])};
+  machine_code = REX("W") + std::vector<uint8_t>{ 0x63 } +
+   ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs());
+
+
+ } else {
+  throw std::runtime_error("Unimplemented: movsx "s + args[0].type().name() + " "s + args[1].type().name());
+ }
+}
+
+namespace {
+
+bool registered {
+ registerOp(mangleName<Asm::Args::Register16, Asm::Args::Register8>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Register8>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register8>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Register16>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register16>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register32>("movsxd"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register16, Asm::Args::Mem8Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem8Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem8Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem16Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem16Ptr64>("movsx"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem32Ptr64>("movsxd"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+               return std::make_shared<Op_movsx>(args);
+            })
+};
+
+}
-- 
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