From 031bfef600e7021c8bd72e2e663f368e7386b131 Mon Sep 17 00:00:00 2001
From: Roland Reichwein <mail@reichwein.it>
Date: Wed, 18 Nov 2020 17:55:27 +0100
Subject: Added Asm ops

---
 asm/intel64/neg.cpp | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 asm/intel64/neg.cpp

(limited to 'asm/intel64/neg.cpp')

diff --git a/asm/intel64/neg.cpp b/asm/intel64/neg.cpp
new file mode 100644
index 0000000..121a54f
--- /dev/null
+++ b/asm/intel64/neg.cpp
@@ -0,0 +1,59 @@
+#include "neg.h"
+
+#include "codes.h"
+
+#include <asm/assembler.h>
+#include <asm/operators.h>
+
+using namespace std::string_literals;
+
+Op_neg::Op_neg(const Asm::Args& args)
+{
+ if (args[0].type() == typeid(Asm::Args::Register8)) { // neg reg8
+  machine_code = std::vector<uint8_t>{ 0xF6 } + ModRM("/3", std::any_cast<Asm::Args::Register8>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32)) { // neg reg32
+  machine_code = std::vector<uint8_t>{ 0xF7 } + ModRM("/3", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64)) { // neg reg64
+  machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } + ModRM("/3", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64)) { // neg byte ptr [reg64]
+  machine_code = std::vector<uint8_t>{ 0xF6 } + ModRM("/3", std::any_cast<Asm::Args::Register8>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64)) { // neg dword ptr [reg64]
+  machine_code = std::vector<uint8_t>{ 0xF7 } + ModRM("/3", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64)) { // neg qword ptr [reg64]
+  machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } + ModRM("/3", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else {
+  throw std::runtime_error("Unimplemented: neg "s + args[0].type().name() + " "s + args[1].type().name());
+ }
+}
+
+namespace {
+
+bool registered {
+ registerOp(mangleName<Asm::Args::Register8>("neg"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_neg>(args);
+                             }) &&
+ registerOp(mangleName<Asm::Args::Register32>("neg"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_neg>(args);
+                             }) &&
+ registerOp(mangleName<Asm::Args::Register64>("neg"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_neg>(args);
+                             }) &&
+ registerOp(mangleName<Asm::Args::Mem8Ptr64>("neg"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_neg>(args);
+                             }) &&
+ registerOp(mangleName<Asm::Args::Mem32Ptr64>("neg"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_neg>(args);
+                             }) &&
+ registerOp(mangleName<Asm::Args::Mem64Ptr64>("neg"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+                             return std::make_shared<Op_neg>(args);
+                             })
+};
+
+}
+
-- 
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