From 1349c00b782eca3ea841bfa388301cb6fc908cc7 Mon Sep 17 00:00:00 2001
From: Roland Reichwein <mail@reichwein.it>
Date: Sun, 18 Oct 2020 20:39:56 +0200
Subject: Namespace Asm
---
asm/intel64/add.cpp | 22 +++++++++++-----------
asm/intel64/add.h | 2 +-
asm/intel64/int.cpp | 6 +++---
asm/intel64/int.h | 2 +-
asm/intel64/jmp.cpp | 6 +++---
asm/intel64/jmp.h | 2 +-
asm/intel64/mov.cpp | 8 ++++----
asm/intel64/mov.h | 2 +-
asm/intel64/nop.cpp | 2 +-
asm/intel64/ret.cpp | 2 +-
asm/intel64/xor.cpp | 8 ++++----
asm/intel64/xor.h | 2 +-
12 files changed, 32 insertions(+), 32 deletions(-)
(limited to 'asm/intel64')
diff --git a/asm/intel64/add.cpp b/asm/intel64/add.cpp
index 2de2219..106ffec 100644
--- a/asm/intel64/add.cpp
+++ b/asm/intel64/add.cpp
@@ -7,18 +7,18 @@
using namespace std::string_literals;
-Op_add::Op_add(AsmArgs& args)
+Op_add::Op_add(Asm::Args& args)
{
- if (args[0].type() == typeid(AsmArgs::Register32) &&
- std::any_cast<AsmArgs::Register32>(args[0]).name() == "eax" &&
- args[1].type() == typeid(AsmArgs::Immediate32))
+ if (args[0].type() == typeid(Asm::Args::Register32) &&
+ std::any_cast<Asm::Args::Register32>(args[0]).name() == "eax" &&
+ args[1].type() == typeid(Asm::Args::Immediate32))
{ // add eax, imm32
- machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<AsmArgs::Immediate32>(args[1]).getCode();
- } else if (args[0].type() == typeid(AsmArgs::Register64) &&
- std::any_cast<AsmArgs::Register64>(args[0]).name() == "rax" &&
- args[1].type() == typeid(AsmArgs::Immediate32))
+ machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+ } else if (args[0].type() == typeid(Asm::Args::Register64) &&
+ std::any_cast<Asm::Args::Register64>(args[0]).name() == "rax" &&
+ args[1].type() == typeid(Asm::Args::Immediate32))
{ // add rax, imm32
- machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<AsmArgs::Immediate32>(args[1]).getCode();
+ machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
} else {
throw std::runtime_error("Unimplemented: add "s + args[0].type().name() + " "s + args[1].type().name());
}
@@ -27,10 +27,10 @@ Op_add::Op_add(AsmArgs& args)
namespace {
bool registered {
- registerOp(mangleName<AsmArgs::Register32, AsmArgs::Immediate32>("add"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("add"), [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
- registerOp(mangleName<AsmArgs::Register64, AsmArgs::Immediate32>("add"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate32>("add"), [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
})
};
diff --git a/asm/intel64/add.h b/asm/intel64/add.h
index 4c6b589..1d55317 100644
--- a/asm/intel64/add.h
+++ b/asm/intel64/add.h
@@ -7,7 +7,7 @@
class Op_add: public Op
{
public:
- Op_add(AsmArgs& args);
+ Op_add(Asm::Args& args);
public:
std::vector<uint8_t> getCode() override
diff --git a/asm/intel64/int.cpp b/asm/intel64/int.cpp
index a7df338..de6c73b 100644
--- a/asm/intel64/int.cpp
+++ b/asm/intel64/int.cpp
@@ -2,11 +2,11 @@
#include <asm/assembler.h>
-Op_int::Op_int(AsmArgs& args)
+Op_int::Op_int(Asm::Args& args)
{
// At this point, the registration already ensured the number and types of args
- AsmArgs::Immediate8 i {std::any_cast<AsmArgs::Immediate8>(args[0])};
+ Asm::Args::Immediate8 i {std::any_cast<Asm::Args::Immediate8>(args[0])};
if (i.value() == 0) { // INT 0
machine_code = { 0xCE };
@@ -21,7 +21,7 @@ Op_int::Op_int(AsmArgs& args)
namespace {
-bool registered { registerOp(mangleName<AsmArgs::Immediate8>("int"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+bool registered { registerOp(mangleName<Asm::Args::Immediate8>("int"), [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_int>(args);
}) };
diff --git a/asm/intel64/int.h b/asm/intel64/int.h
index 7bd60c8..aee4962 100644
--- a/asm/intel64/int.h
+++ b/asm/intel64/int.h
@@ -7,7 +7,7 @@
class Op_int: public Op
{
public:
- Op_int(AsmArgs& args);
+ Op_int(Asm::Args& args);
public:
std::vector<uint8_t> getCode() override
diff --git a/asm/intel64/jmp.cpp b/asm/intel64/jmp.cpp
index 3899cac..8542127 100644
--- a/asm/intel64/jmp.cpp
+++ b/asm/intel64/jmp.cpp
@@ -61,7 +61,7 @@ namespace {
bool registerOps() {
bool result{true};
for (const auto& jumpOp: jumpOps) {
- result &= registerOp(mangleName<AsmArgs::Label>(jumpOp.name), [&](AsmArgs& args) -> std::shared_ptr<Op>{
+ result &= registerOp(mangleName<Asm::Args::Label>(jumpOp.name), [&](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_jmp>(jumpOp.name, args, jumpOp.jmp8, jumpOp.jmp32);
});
}
@@ -73,9 +73,9 @@ namespace {
};
}
-Op_jmp::Op_jmp(const std::string& name, AsmArgs& args, const OP_T& jmp8, const OP_T& jmp32)
+Op_jmp::Op_jmp(const std::string& name, Asm::Args& args, const OP_T& jmp8, const OP_T& jmp32)
{
- label = std::any_cast<AsmArgs::Label>(args[0]).name();
+ label = std::any_cast<Asm::Args::Label>(args[0]).name();
if (!jmp32.empty()) { // set machine_code
machine_code = jmp32 + OP_T(size_t(4), uint8_t(0));
diff --git a/asm/intel64/jmp.h b/asm/intel64/jmp.h
index db8a5a8..a7c7511 100644
--- a/asm/intel64/jmp.h
+++ b/asm/intel64/jmp.h
@@ -10,7 +10,7 @@
class Op_jmp: public Op, public AddressFeature
{
public:
- Op_jmp(const std::string& name, AsmArgs& args, const OP_T& jmp8, const OP_T& jmp32);
+ Op_jmp(const std::string& name, Asm::Args& args, const OP_T& jmp8, const OP_T& jmp32);
std::vector<uint8_t> getCode() override
{
diff --git a/asm/intel64/mov.cpp b/asm/intel64/mov.cpp
index 33589e9..40a48f8 100644
--- a/asm/intel64/mov.cpp
+++ b/asm/intel64/mov.cpp
@@ -9,12 +9,12 @@
using namespace std::string_literals;
-Op_mov::Op_mov(AsmArgs& args)
+Op_mov::Op_mov(Asm::Args& args)
{
- if (args[0].type() == typeid(AsmArgs::Register8) && args[1].type() == typeid(AsmArgs::Register8)) { // mov reg8, reg8
+ if (args[0].type() == typeid(Asm::Args::Register8) && args[1].type() == typeid(Asm::Args::Register8)) { // mov reg8, reg8
// r/m8, r8: ModRM:r/m (w), ModRM:reg (r)
machine_code = std::vector<uint8_t>{ 0x88 } +
- ModRM(std::any_cast<AsmArgs::Register8>(args[1]).name(), std::any_cast<AsmArgs::Register8>(args[0]).name());
+ ModRM(std::any_cast<Asm::Args::Register8>(args[1]).name(), std::any_cast<Asm::Args::Register8>(args[0]).name());
} else {
throw std::runtime_error("Unimplemented: mov "s + args[0].type().name() + " "s + args[1].type().name());
}
@@ -23,7 +23,7 @@ Op_mov::Op_mov(AsmArgs& args)
namespace {
bool registered {
- registerOp(mangleName<AsmArgs::Register8, AsmArgs::Register8>("mov"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register8, Asm::Args::Register8>("mov"), [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_mov>(args);
})
};
diff --git a/asm/intel64/mov.h b/asm/intel64/mov.h
index e1b2304..53afed4 100644
--- a/asm/intel64/mov.h
+++ b/asm/intel64/mov.h
@@ -7,7 +7,7 @@
class Op_mov: public Op
{
public:
- Op_mov(AsmArgs& args);
+ Op_mov(Asm::Args& args);
public:
std::vector<uint8_t> getCode() override
diff --git a/asm/intel64/nop.cpp b/asm/intel64/nop.cpp
index 450de46..2d99278 100644
--- a/asm/intel64/nop.cpp
+++ b/asm/intel64/nop.cpp
@@ -4,7 +4,7 @@
namespace {
-bool registered { registerOp("nop", [](AsmArgs& args) -> std::shared_ptr<Op>{
+bool registered { registerOp("nop", [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_nop>();
}) };
diff --git a/asm/intel64/ret.cpp b/asm/intel64/ret.cpp
index cd9ddd4..c42ad8a 100644
--- a/asm/intel64/ret.cpp
+++ b/asm/intel64/ret.cpp
@@ -4,7 +4,7 @@
namespace {
-bool registered { registerOp("ret", [](AsmArgs& args) -> std::shared_ptr<Op>{
+bool registered { registerOp("ret", [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_ret>();
}) };
diff --git a/asm/intel64/xor.cpp b/asm/intel64/xor.cpp
index c0dbb68..2aa4272 100644
--- a/asm/intel64/xor.cpp
+++ b/asm/intel64/xor.cpp
@@ -9,12 +9,12 @@
using namespace std::string_literals;
-Op_xor::Op_xor(AsmArgs& args)
+Op_xor::Op_xor(Asm::Args& args)
{
- if (args[0].type() == typeid(AsmArgs::Register8) && args[1].type() == typeid(AsmArgs::Register8)) { // xor reg8, reg8
+ if (args[0].type() == typeid(Asm::Args::Register8) && args[1].type() == typeid(Asm::Args::Register8)) { // xor reg8, reg8
// r8, r/m8: ModRM:reg (w), ModRM:r/m (r)
machine_code = std::vector<uint8_t>{ 0x32 } +
- ModRM(std::any_cast<AsmArgs::Register8>(args[0]).name(), std::any_cast<AsmArgs::Register8>(args[1]).name());
+ ModRM(std::any_cast<Asm::Args::Register8>(args[0]).name(), std::any_cast<Asm::Args::Register8>(args[1]).name());
} else {
throw std::runtime_error("Unimplemented: xor "s + args[0].type().name() + " "s + args[1].type().name());
}
@@ -23,7 +23,7 @@ Op_xor::Op_xor(AsmArgs& args)
namespace {
bool registered {
- registerOp(mangleName<AsmArgs::Register8, AsmArgs::Register8>("xor"), [](AsmArgs& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register8, Asm::Args::Register8>("xor"), [](Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_xor>(args);
})
};
diff --git a/asm/intel64/xor.h b/asm/intel64/xor.h
index f00a657..7e07006 100644
--- a/asm/intel64/xor.h
+++ b/asm/intel64/xor.h
@@ -7,7 +7,7 @@
class Op_xor: public Op
{
public:
- Op_xor(AsmArgs& args);
+ Op_xor(Asm::Args& args);
public:
std::vector<uint8_t> getCode() override
--
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