#include "cmp.h"

#include "codes.h"

#include <asm/assembler.h>
#include <asm/operators.h>

using namespace std::string_literals;

Op_cmp::Op_cmp(const Asm::Args& args)
{
 if (args[0].type() == typeid(Asm::Args::Register32) &&
     std::any_cast<Asm::Args::Register32>(args[0]).name() == "eax" &&
     args[1].type() == typeid(Asm::Args::Immediate32))
 { // cmp eax, imm32 (before "cmp reg32, imm32"! It's shorter.)
  machine_code = std::vector<uint8_t>{ 0x3D } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();

 } else if (args[0].type() == typeid(Asm::Args::Register32) &&
     args[1].type() == typeid(Asm::Args::Immediate32))
 { // cmp reg32, imm32
  machine_code = std::vector<uint8_t>{ 0x81 } + ModRM("/7", std::any_cast<Asm::Args::Register32>(args[0]).name()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();

 } else if (args[0].type() == typeid(Asm::Args::Register64) &&
            std::any_cast<Asm::Args::Register64>(args[0]).name() == "rax"  &&
            args[1].type() == typeid(Asm::Args::Immediate32))

 { // cmp rax, imm32 (sign extended)
  machine_code = REX("W") + std::vector<uint8_t>{ 0x3D } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();

 } else if (args[0].type() == typeid(Asm::Args::Register8) && args[1].type() == typeid(Asm::Args::Register8)) { // cmp reg8, reg8
  machine_code = std::vector<uint8_t>{ 0x38 } + ModRM(std::any_cast<Asm::Args::Register8>(args[1]).name(), std::any_cast<Asm::Args::Register8>(args[0]).name());

 } else if (args[0].type() == typeid(Asm::Args::Register16) && args[1].type() == typeid(Asm::Args::Register16)) { // cmp reg16, reg16
  machine_code = OpSizePrefix() + std::vector<uint8_t>{ 0x39 } + ModRM(std::any_cast<Asm::Args::Register8>(args[1]).name(), std::any_cast<Asm::Args::Register8>(args[0]).name());

 } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register32)) { // cmp reg32, reg32
  machine_code = std::vector<uint8_t>{ 0x39 } + ModRM(std::any_cast<Asm::Args::Register32>(args[1]).name(), std::any_cast<Asm::Args::Register32>(args[0]).name());

 } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register64)) { // cmp reg64, reg64
  machine_code = REX("W") + std::vector<uint8_t>{ 0x39 } + ModRM(std::any_cast<Asm::Args::Register64>(args[1]).name(), std::any_cast<Asm::Args::Register64>(args[0]).name());

 } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem32Ptr64)) { // cmp reg32, [reg64]
  Asm::Args::Mem32Ptr64 ptr{std::any_cast<Asm::Args::Mem32Ptr64>(args[1])};
  machine_code = std::vector<uint8_t>{ 0x3B } + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), ptr.reg(), ptr.offs());

 } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem64Ptr64)) { // cmp reg64, [reg64]
  Asm::Args::Mem64Ptr64 ptr{std::any_cast<Asm::Args::Mem64Ptr64>(args[1])};
  machine_code = REX("W") + std::vector<uint8_t>{ 0x3B } + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), ptr.reg(), ptr.offs());

 } else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64) && args[1].type() == typeid(Asm::Args::Immediate8)) { // cmp [reg64], imm8
  Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[0])};
  machine_code = std::vector<uint8_t>{ 0x80 } + ModRM("/7", ptr.reg(), ptr.offs()) + std::any_cast<Asm::Args::Immediate8>(args[1]).getCode();

 } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // cmp [reg64], imm32
  Asm::Args::Mem32Ptr64 ptr{std::any_cast<Asm::Args::Mem32Ptr64>(args[0])};
  machine_code = std::vector<uint8_t>{ 0x81 } + ModRM("/7", ptr.reg(), ptr.offs()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();

 } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // cmp qword ptr [reg64], imm32 (sign-extended)
  Asm::Args::Mem64Ptr64 ptr{std::any_cast<Asm::Args::Mem64Ptr64>(args[0])};
  machine_code = REX("W") + std::vector<uint8_t>{ 0x81 } + ModRM("/7", ptr.reg(), ptr.offs()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();

 } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Immediate64)) { // cmp qword ptr [reg64], imm32 (sign-extended) - reduce imm64 to imm32!
  Asm::Args::Mem64Ptr64 ptr{std::any_cast<Asm::Args::Mem64Ptr64>(args[0])};
  Asm::Args::Immediate32 imm32{std::any_cast<Asm::Args::Immediate64>(args[1])};
  machine_code = REX("W") + std::vector<uint8_t>{ 0x81 } + ModRM("/7", ptr.reg(), ptr.offs()) + imm32.getCode();

 } else {
  throw std::runtime_error("Unimplemented: cmp "s + args[0].type().name() + " "s + args[1].type().name());
 }
}

namespace {

bool registered {
 registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate32>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register8, Asm::Args::Register8>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register16, Asm::Args::Register16>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register32, Asm::Args::Register32>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register64>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem32Ptr64>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem64Ptr64>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem8Ptr64, Asm::Args::Immediate8>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem32Ptr64, Asm::Args::Immediate32>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate32>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_cmp>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate64>("cmp"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ // automatically converted to 32-bit (sign extended) if small enough. Intel doesn't support CMP ..., imm64
                             return std::make_shared<Op_cmp>(args);
                             })
};

}