#include "shr.h"

#include "codes.h"

#include <asm/assembler.h>
#include <asm/operators.h>

using namespace std::string_literals;

Op_shr::Op_shr(const Asm::Args& args)
{
 if (args[1].type() == typeid(Asm::Args::Immediate8)) {
  std::vector<uint8_t> shift_offset{std::any_cast<Asm::Args::Immediate8>(args[1]).getCode()};
  if (shift_offset == std::vector<uint8_t>{ 0x01 }) { // 1 bit version is shorter
   if (args[0].type() == typeid(Asm::Args::Register8)) { // shr reg8, 1
    machine_code = std::vector<uint8_t>{ 0xD0 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name());
   } else if (args[0].type() == typeid(Asm::Args::Register32)) { // shr reg32, 1
    machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/5", std::any_cast<Asm::Args::Register32>(args[0]).name());
   } else if (args[0].type() == typeid(Asm::Args::Register64)) { // shr reg64, 1
    machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/5", std::any_cast<Asm::Args::Register64>(args[0]).name());
   }
  } else { // general version >= 2 bits shift
   if (args[0].type() == typeid(Asm::Args::Register8)) { // shr reg8, imm8
    machine_code = std::vector<uint8_t>{ 0xC0 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset;
   } else if (args[0].type() == typeid(Asm::Args::Register32)) { // shr reg32, imm8
    machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/5", std::any_cast<Asm::Args::Register32>(args[0]).name()) + shift_offset;
   } else if (args[0].type() == typeid(Asm::Args::Register64)) { // shr reg64, imm8
    machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/5", std::any_cast<Asm::Args::Register64>(args[0]).name()) + shift_offset;
   }
  }

 } else {
  throw std::runtime_error("Unimplemented: shr "s + args[0].type().name() + " "s + args[1].type().name());
 }
}

namespace {

bool registered {
 registerOp(mangleName<Asm::Args::Register8, Asm::Args::Immediate8>("shr"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_shr>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate8>("shr"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_shr>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate8>("shr"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_shr>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem8Ptr64, Asm::Args::Immediate8>("shr"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_shr>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem32Ptr64, Asm::Args::Immediate8>("shr"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_shr>(args);
                             }) &&
 registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate8>("shr"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
                             return std::make_shared<Op_shr>(args);
                             })
};

}