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| author | Roland Reichwein <mail@reichwein.it> | 2020-11-21 15:19:45 +0100 |
|---|---|---|
| committer | Roland Reichwein <mail@reichwein.it> | 2020-11-21 15:19:45 +0100 |
| commit | 7edbd99775416a32c88acf8e9379518436905f02 (patch) | |
| tree | 6356edb79f846df4aa2f6a8a5ecfeef4e651bcc0 /asm/intel64/div.cpp | |
| parent | 7250bbe5ae2d2ee6b0334bc462aab73f7d8dac0e (diff) | |
Support gcc 10 and clang 11
Diffstat (limited to 'asm/intel64/div.cpp')
| -rw-r--r-- | asm/intel64/div.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/asm/intel64/div.cpp b/asm/intel64/div.cpp index 9ca24e9..1e98b7b 100644 --- a/asm/intel64/div.cpp +++ b/asm/intel64/div.cpp @@ -20,6 +20,15 @@ Op_div::Op_div(const Asm::Args& args) } else if (args[0].type() == typeid(Asm::Args::Register64)) { // div reg64 (accu is rax (remainder=rdx) <- rdx:rax / reg64) machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } + ModRM("/6", std::any_cast<Asm::Args::Register64>(args[0]).name()); + } else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64)) { // div byte ptr [reg64] (accu is al (remainder=ah) <- ah / x) + machine_code = std::vector<uint8_t>{ 0xF6 } + + ModRM("/6", std::any_cast<Asm::Args::Mem8Ptr64>(args[0]).reg()); + } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64)) { // div dword ptr [reg64] (accu is eax (remainder=edx) <- edx:eax / x) + machine_code = std::vector<uint8_t>{ 0xF7 } + + ModRM("/6", std::any_cast<Asm::Args::Mem32Ptr64>(args[0]).reg()); + } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64)) { // div qword ptr [reg64] (accu is rax (remainder=rdx) <- rdx:rax / x) + machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } + + ModRM("/6", std::any_cast<Asm::Args::Mem64Ptr64>(args[0]).reg()); } else { throw std::runtime_error("Unimplemented: div "s + args[0].type().name()); } @@ -36,6 +45,15 @@ bool registered { }) && registerOp(mangleName<Asm::Args::Register64>("div"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ return std::make_shared<Op_div>(args); + }) && + registerOp(mangleName<Asm::Args::Mem8Ptr64>("div"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_div>(args); + }) && + registerOp(mangleName<Asm::Args::Mem32Ptr64>("div"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_div>(args); + }) && + registerOp(mangleName<Asm::Args::Mem64Ptr64>("div"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_div>(args); }) }; |