diff options
| author | Roland Reichwein <mail@reichwein.it> | 2020-11-15 13:55:18 +0100 | 
|---|---|---|
| committer | Roland Reichwein <mail@reichwein.it> | 2020-11-15 13:55:18 +0100 | 
| commit | d07c5bc14edbe071ee7b4f47f174780e95e451aa (patch) | |
| tree | 889ed88ea6907119b75b7b76f616a604c9857e3d /asm/intel64/idiv.cpp | |
| parent | 9e7f4c9d43b310c280cd6432cd4150411f4b914e (diff) | |
Simplify Asm construction
Diffstat (limited to 'asm/intel64/idiv.cpp')
| -rw-r--r-- | asm/intel64/idiv.cpp | 6 | 
1 files changed, 3 insertions, 3 deletions
diff --git a/asm/intel64/idiv.cpp b/asm/intel64/idiv.cpp index 3ee17a3..debeeb4 100644 --- a/asm/intel64/idiv.cpp +++ b/asm/intel64/idiv.cpp @@ -9,7 +9,7 @@  using namespace std::string_literals; -Op_idiv::Op_idiv(Asm::Args& args) +Op_idiv::Op_idiv(const Asm::Args& args)  {   if (args[0].type() == typeid(Asm::Args::Register8)) { // idiv reg8 (accu is al (remainder=ah) <- ah / reg8)    machine_code = std::vector<uint8_t>{ 0xF6 } + @@ -28,10 +28,10 @@ Op_idiv::Op_idiv(Asm::Args& args)  namespace {  bool registered { - registerOp(mangleName<Asm::Args::Register8>("idiv"), [](Asm::Args& args) -> std::shared_ptr<Op>{ + registerOp(mangleName<Asm::Args::Register8>("idiv"), [](const Asm::Args& args) -> std::shared_ptr<Op>{                 return std::make_shared<Op_idiv>(args);              }) && - registerOp(mangleName<Asm::Args::Register64>("idiv"), [](Asm::Args& args) -> std::shared_ptr<Op>{ + registerOp(mangleName<Asm::Args::Register64>("idiv"), [](const Asm::Args& args) -> std::shared_ptr<Op>{                 return std::make_shared<Op_idiv>(args);              })  };  | 
