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authorRoland Reichwein <mail@reichwein.it>2020-11-15 13:55:18 +0100
committerRoland Reichwein <mail@reichwein.it>2020-11-15 13:55:18 +0100
commitd07c5bc14edbe071ee7b4f47f174780e95e451aa (patch)
tree889ed88ea6907119b75b7b76f616a604c9857e3d /asm/intel64/imul.cpp
parent9e7f4c9d43b310c280cd6432cd4150411f4b914e (diff)
Simplify Asm construction
Diffstat (limited to 'asm/intel64/imul.cpp')
-rw-r--r--asm/intel64/imul.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/asm/intel64/imul.cpp b/asm/intel64/imul.cpp
index 4df8577..0ffca30 100644
--- a/asm/intel64/imul.cpp
+++ b/asm/intel64/imul.cpp
@@ -9,7 +9,7 @@
using namespace std::string_literals;
-Op_imul::Op_imul(Asm::Args& args)
+Op_imul::Op_imul(const Asm::Args& args)
{
if (args[0].type() == typeid(Asm::Args::Register8)) { // imul reg8 (accu is ax <- al)
machine_code = std::vector<uint8_t>{ 0xF6 } +
@@ -28,13 +28,13 @@ Op_imul::Op_imul(Asm::Args& args)
namespace {
bool registered {
- registerOp(mangleName<Asm::Args::Register8>("imul"), [](Asm::Args& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register8>("imul"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_imul>(args);
}) &&
- registerOp(mangleName<Asm::Args::Register32>("imul"), [](Asm::Args& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register32>("imul"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_imul>(args);
}) &&
- registerOp(mangleName<Asm::Args::Register64>("imul"), [](Asm::Args& args) -> std::shared_ptr<Op>{
+ registerOp(mangleName<Asm::Args::Register64>("imul"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_imul>(args);
})
};