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author | Roland Reichwein <mail@reichwein.it> | 2020-11-09 10:35:00 +0100 |
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committer | Roland Reichwein <mail@reichwein.it> | 2020-11-09 10:35:00 +0100 |
commit | 6ab3715ee2622e293f7c4924511f31347b327e6e (patch) | |
tree | eca588d3d8c320cb25f209b76db91b95cd9f5614 /asm/intel64/inc.h | |
parent | 1ac8ab06e9aad3b6d22685255459d71cb49e1f28 (diff) |
Implement inc instruction, support 64 bit regs
Diffstat (limited to 'asm/intel64/inc.h')
-rw-r--r-- | asm/intel64/inc.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/asm/intel64/inc.h b/asm/intel64/inc.h new file mode 100644 index 0000000..0887392 --- /dev/null +++ b/asm/intel64/inc.h @@ -0,0 +1,31 @@ +// Increment Register + +#pragma once + +#include <asm/assembler.h> + +class Op_inc: public Op +{ +public: + Op_inc(Asm::Args& args); + +public: + std::vector<uint8_t> getCode() override + { + return machine_code; + } + + size_t size() override + { + return machine_code.size(); + } + + bool optimize() override ///< returns true if changed + { + return false; + } + +protected: + std::vector<uint8_t> machine_code; +}; + |