diff options
| author | Roland Reichwein <mail@reichwein.it> | 2020-11-09 10:35:00 +0100 |
|---|---|---|
| committer | Roland Reichwein <mail@reichwein.it> | 2020-11-09 10:35:00 +0100 |
| commit | 6ab3715ee2622e293f7c4924511f31347b327e6e (patch) | |
| tree | eca588d3d8c320cb25f209b76db91b95cd9f5614 /asm/intel64/mov.cpp | |
| parent | 1ac8ab06e9aad3b6d22685255459d71cb49e1f28 (diff) | |
Implement inc instruction, support 64 bit regs
Diffstat (limited to 'asm/intel64/mov.cpp')
| -rw-r--r-- | asm/intel64/mov.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/asm/intel64/mov.cpp b/asm/intel64/mov.cpp index 8603fc9..5741170 100644 --- a/asm/intel64/mov.cpp +++ b/asm/intel64/mov.cpp @@ -17,6 +17,8 @@ Op_mov::Op_mov(Asm::Args& args) ModRM(std::any_cast<Asm::Args::Register8>(args[1]).name(), std::any_cast<Asm::Args::Register8>(args[0]).name()); } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Immediate32)) { // mov reg32, imm32 machine_code = std::vector<uint8_t>{ static_cast<uint8_t>(0xB8 + RegNo(std::any_cast<Asm::Args::Register32>(args[0]).name())) } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode(); + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Immediate64)) { // mov reg64, imm64 + machine_code = std::vector<uint8_t>{ REX("W") + static_cast<uint8_t>(0xB8 + RegNo(std::any_cast<Asm::Args::Register64>(args[0]).name())) } + std::any_cast<Asm::Args::Immediate64>(args[1]).getCode(); } else { throw std::runtime_error("Unimplemented: mov "s + args[0].type().name() + " "s + args[1].type().name()); } @@ -30,6 +32,9 @@ bool registered { }) && registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("mov"), [](Asm::Args& args) -> std::shared_ptr<Op>{ return std::make_shared<Op_mov>(args); + }) && + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate64>("mov"), [](Asm::Args& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_mov>(args); }) }; |