summaryrefslogtreecommitdiffhomepage
path: root/asm/intel64/mov.cpp
diff options
context:
space:
mode:
authorRoland Reichwein <mail@reichwein.it>2020-11-21 22:57:25 +0100
committerRoland Reichwein <mail@reichwein.it>2020-11-21 22:57:25 +0100
commit739297d8895b08a9ecd8e81b01b7ba8e8dc4a8ae (patch)
treede0c20a23a60c1ccca8585f5ddd71eeb6be25623 /asm/intel64/mov.cpp
parent39bccce4fdd1d5ebe312321c963e0325e4d696c5 (diff)
Bugfix push + pop
Diffstat (limited to 'asm/intel64/mov.cpp')
-rw-r--r--asm/intel64/mov.cpp29
1 files changed, 29 insertions, 0 deletions
diff --git a/asm/intel64/mov.cpp b/asm/intel64/mov.cpp
index 5d09def..805675a 100644
--- a/asm/intel64/mov.cpp
+++ b/asm/intel64/mov.cpp
@@ -51,6 +51,23 @@ Op_mov::Op_mov(const Asm::Args& args)
} else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // mov reg64, imm32 (sign-extended)
machine_code = REX("W") + std::vector<uint8_t>{ 0xC7 } + ModRM("/0", std::any_cast<Asm::Args::Register64>(args[0]).name()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+ } else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64) && args[1].type() == typeid(Asm::Args::Immediate8)) { // mov [reg64], imm8
+ Asm::Args::Mem8Ptr64 ptr{std::any_cast<Asm::Args::Mem8Ptr64>(args[0])};
+ machine_code = std::vector<uint8_t>{ 0xC6 } + ModRM("/0", ptr.reg(), ptr.offs()) + std::any_cast<Asm::Args::Immediate8>(args[1]).getCode();
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // mov [reg64], imm32
+ Asm::Args::Mem32Ptr64 ptr{std::any_cast<Asm::Args::Mem32Ptr64>(args[0])};
+ machine_code = std::vector<uint8_t>{ 0xC7 } + ModRM("/0", ptr.reg(), ptr.offs()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // mov [reg64], imm32 (sign-extended to imm64)
+ Asm::Args::Mem64Ptr64 ptr{std::any_cast<Asm::Args::Mem64Ptr64>(args[0])};
+ machine_code = REX("W") + std::vector<uint8_t>{ 0xC7 } + ModRM("/0", ptr.reg(), ptr.offs()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Immediate64)) { // mov [reg64], imm64 (cut to imm32)
+ Asm::Args::Mem64Ptr64 ptr{std::any_cast<Asm::Args::Mem64Ptr64>(args[0])};
+ Asm::Args::Immediate32 imm32{std::any_cast<Asm::Args::Immediate64>(args[1])};
+ machine_code = REX("W") + std::vector<uint8_t>{ 0xC7 } + ModRM("/0", ptr.reg(), ptr.offs()) + imm32.getCode();
+
} else {
throw std::runtime_error("Unimplemented: mov "s + args[0].type().name() + " "s + args[1].type().name());
}
@@ -88,6 +105,18 @@ bool registered {
}) &&
registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate32>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_mov>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem8Ptr64, Asm::Args::Immediate8>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_mov>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem32Ptr64, Asm::Args::Immediate32>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_mov>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate32>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_mov>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate64>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_mov>(args);
})
};