diff options
author | Roland Reichwein <mail@reichwein.it> | 2020-11-15 13:55:18 +0100 |
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committer | Roland Reichwein <mail@reichwein.it> | 2020-11-15 13:55:18 +0100 |
commit | d07c5bc14edbe071ee7b4f47f174780e95e451aa (patch) | |
tree | 889ed88ea6907119b75b7b76f616a604c9857e3d /asm/intel64/mov.cpp | |
parent | 9e7f4c9d43b310c280cd6432cd4150411f4b914e (diff) |
Simplify Asm construction
Diffstat (limited to 'asm/intel64/mov.cpp')
-rw-r--r-- | asm/intel64/mov.cpp | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/asm/intel64/mov.cpp b/asm/intel64/mov.cpp index 5741170..5b224c1 100644 --- a/asm/intel64/mov.cpp +++ b/asm/intel64/mov.cpp @@ -9,16 +9,29 @@ using namespace std::string_literals; -Op_mov::Op_mov(Asm::Args& args) +Op_mov::Op_mov(const Asm::Args& args) { if (args[0].type() == typeid(Asm::Args::Register8) && args[1].type() == typeid(Asm::Args::Register8)) { // mov reg8, reg8 // r/m8, r8: ModRM:r/m (w), ModRM:reg (r) machine_code = std::vector<uint8_t>{ 0x88 } + ModRM(std::any_cast<Asm::Args::Register8>(args[1]).name(), std::any_cast<Asm::Args::Register8>(args[0]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register32)) { // mov reg32, reg32 + // r/m32, r32: ModRM:r/m (w), ModRM:reg (r) + machine_code = std::vector<uint8_t>{ 0x89 } + + ModRM(std::any_cast<Asm::Args::Register32>(args[1]).name(), std::any_cast<Asm::Args::Register32>(args[0]).name()); + + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register64)) { // mov reg64, reg64 + // r/m64, r64: ModRM:r/m (w), ModRM:reg (r) + machine_code = REX("W") + std::vector<uint8_t>{ 0x89 } + + ModRM(std::any_cast<Asm::Args::Register64>(args[1]).name(), std::any_cast<Asm::Args::Register64>(args[0]).name()); + } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Immediate32)) { // mov reg32, imm32 machine_code = std::vector<uint8_t>{ static_cast<uint8_t>(0xB8 + RegNo(std::any_cast<Asm::Args::Register32>(args[0]).name())) } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode(); + } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Immediate64)) { // mov reg64, imm64 machine_code = std::vector<uint8_t>{ REX("W") + static_cast<uint8_t>(0xB8 + RegNo(std::any_cast<Asm::Args::Register64>(args[0]).name())) } + std::any_cast<Asm::Args::Immediate64>(args[1]).getCode(); + } else { throw std::runtime_error("Unimplemented: mov "s + args[0].type().name() + " "s + args[1].type().name()); } @@ -27,13 +40,13 @@ Op_mov::Op_mov(Asm::Args& args) namespace { bool registered { - registerOp(mangleName<Asm::Args::Register8, Asm::Args::Register8>("mov"), [](Asm::Args& args) -> std::shared_ptr<Op>{ + registerOp(mangleName<Asm::Args::Register8, Asm::Args::Register8>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ return std::make_shared<Op_mov>(args); }) && - registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("mov"), [](Asm::Args& args) -> std::shared_ptr<Op>{ + registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ return std::make_shared<Op_mov>(args); }) && - registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate64>("mov"), [](Asm::Args& args) -> std::shared_ptr<Op>{ + registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate64>("mov"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ return std::make_shared<Op_mov>(args); }) }; |