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authorRoland Reichwein <mail@reichwein.it>2020-11-18 17:55:27 +0100
committerRoland Reichwein <mail@reichwein.it>2020-11-18 17:55:27 +0100
commit031bfef600e7021c8bd72e2e663f368e7386b131 (patch)
tree4e724c3b13278e5c6fb90a9380d19dc1d253b4b3 /asm/intel64/not.cpp
parent927eb99e75325164a541c2638e1e607294019381 (diff)
Added Asm ops
Diffstat (limited to 'asm/intel64/not.cpp')
-rw-r--r--asm/intel64/not.cpp59
1 files changed, 59 insertions, 0 deletions
diff --git a/asm/intel64/not.cpp b/asm/intel64/not.cpp
new file mode 100644
index 0000000..58604f4
--- /dev/null
+++ b/asm/intel64/not.cpp
@@ -0,0 +1,59 @@
+#include "not.h"
+
+#include "codes.h"
+
+#include <asm/assembler.h>
+#include <asm/operators.h>
+
+using namespace std::string_literals;
+
+Op_not::Op_not(const Asm::Args& args)
+{
+ if (args[0].type() == typeid(Asm::Args::Register8)) { // not reg8
+ machine_code = std::vector<uint8_t>{ 0xF6 } + ModRM("/2", std::any_cast<Asm::Args::Register8>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32)) { // not reg32
+ machine_code = std::vector<uint8_t>{ 0xF7 } + ModRM("/2", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64)) { // not reg64
+ machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } + ModRM("/2", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64)) { // not byte ptr [reg64]
+ machine_code = std::vector<uint8_t>{ 0xF6 } + ModRM("/2", std::any_cast<Asm::Args::Register8>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64)) { // not dword ptr [reg64]
+ machine_code = std::vector<uint8_t>{ 0xF7 } + ModRM("/2", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64)) { // not qword ptr [reg64]
+ machine_code = REX("W") + std::vector<uint8_t>{ 0xF7 } + ModRM("/2", std::any_cast<Asm::Args::Register32>(args[0]).name());
+
+ } else {
+ throw std::runtime_error("Unimplemented: not "s + args[0].type().name() + " "s + args[1].type().name());
+ }
+}
+
+namespace {
+
+bool registered {
+ registerOp(mangleName<Asm::Args::Register8>("not"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_not>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Register32>("not"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_not>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Register64>("not"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_not>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem8Ptr64>("not"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_not>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem32Ptr64>("not"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_not>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Mem64Ptr64>("not"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_not>(args);
+ })
+};
+
+}
+