diff options
| author | Roland Reichwein <mail@reichwein.it> | 2020-11-24 10:00:47 +0100 |
|---|---|---|
| committer | Roland Reichwein <mail@reichwein.it> | 2020-11-24 10:00:47 +0100 |
| commit | 926b44301aa339b7a204f709959ee44b6ee95902 (patch) | |
| tree | 7332570f3d6b553887f144a91e62e21dfa22a4af /asm/intel64/rol.cpp | |
| parent | 61db05a4127790da3219fccce87c34aa890d1d08 (diff) | |
Implement Shift Left (WIP)
Diffstat (limited to 'asm/intel64/rol.cpp')
| -rw-r--r-- | asm/intel64/rol.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/asm/intel64/rol.cpp b/asm/intel64/rol.cpp index 98d69d9..98e3909 100644 --- a/asm/intel64/rol.cpp +++ b/asm/intel64/rol.cpp @@ -15,17 +15,17 @@ Op_rol::Op_rol(const Asm::Args& args) if (args[0].type() == typeid(Asm::Args::Register8)) { // rol reg8, 1 machine_code = std::vector<uint8_t>{ 0xD0 } + ModRM("/0", std::any_cast<Asm::Args::Register8>(args[0]).name()); } else if (args[0].type() == typeid(Asm::Args::Register32)) { // rol reg32, 1 - machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/0", std::any_cast<Asm::Args::Register8>(args[0]).name()); + machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/0", std::any_cast<Asm::Args::Register32>(args[0]).name()); } else if (args[0].type() == typeid(Asm::Args::Register64)) { // rol reg64, 1 - machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/0", std::any_cast<Asm::Args::Register8>(args[0]).name()); + machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/0", std::any_cast<Asm::Args::Register64>(args[0]).name()); } } else { // general version >= 2 bits shift if (args[0].type() == typeid(Asm::Args::Register8)) { // rol reg8, imm8 machine_code = std::vector<uint8_t>{ 0xC0 } + ModRM("/0", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset; } else if (args[0].type() == typeid(Asm::Args::Register32)) { // rol reg32, imm8 - machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/0", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset; + machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/0", std::any_cast<Asm::Args::Register32>(args[0]).name()) + shift_offset; } else if (args[0].type() == typeid(Asm::Args::Register64)) { // rol reg64, imm8 - machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/0", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset; + machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/0", std::any_cast<Asm::Args::Register64>(args[0]).name()) + shift_offset; } } |