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authorRoland Reichwein <mail@reichwein.it>2020-11-24 10:00:47 +0100
committerRoland Reichwein <mail@reichwein.it>2020-11-24 10:00:47 +0100
commit926b44301aa339b7a204f709959ee44b6ee95902 (patch)
tree7332570f3d6b553887f144a91e62e21dfa22a4af /asm/intel64/shr.cpp
parent61db05a4127790da3219fccce87c34aa890d1d08 (diff)
Implement Shift Left (WIP)
Diffstat (limited to 'asm/intel64/shr.cpp')
-rw-r--r--asm/intel64/shr.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/asm/intel64/shr.cpp b/asm/intel64/shr.cpp
index 01977b0..b85fc71 100644
--- a/asm/intel64/shr.cpp
+++ b/asm/intel64/shr.cpp
@@ -15,17 +15,17 @@ Op_shr::Op_shr(const Asm::Args& args)
if (args[0].type() == typeid(Asm::Args::Register8)) { // shr reg8, 1
machine_code = std::vector<uint8_t>{ 0xD0 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register32)) { // shr reg32, 1
- machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name());
+ machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/5", std::any_cast<Asm::Args::Register32>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register64)) { // shr reg64, 1
- machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name());
+ machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/5", std::any_cast<Asm::Args::Register64>(args[0]).name());
}
} else { // general version >= 2 bits shift
if (args[0].type() == typeid(Asm::Args::Register8)) { // shr reg8, imm8
machine_code = std::vector<uint8_t>{ 0xC0 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset;
} else if (args[0].type() == typeid(Asm::Args::Register32)) { // shr reg32, imm8
- machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset;
+ machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/5", std::any_cast<Asm::Args::Register32>(args[0]).name()) + shift_offset;
} else if (args[0].type() == typeid(Asm::Args::Register64)) { // shr reg64, imm8
- machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/5", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset;
+ machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/5", std::any_cast<Asm::Args::Register64>(args[0]).name()) + shift_offset;
}
}