diff options
author | Roland Reichwein <mail@reichwein.it> | 2020-10-17 17:37:50 +0200 |
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committer | Roland Reichwein <mail@reichwein.it> | 2020-10-17 17:37:50 +0200 |
commit | 7b49d17f90f26394a116348befb5edcdffcedcb6 (patch) | |
tree | c32e76a9bea5851bfac92708fa626373573e4f06 /asm/intel64 | |
parent | f86999e137f43372236f2dccd1fe3572a85c0dcd (diff) |
Add ret and int
Diffstat (limited to 'asm/intel64')
-rw-r--r-- | asm/intel64/all_ops.h | 5 | ||||
-rw-r--r-- | asm/intel64/int.cpp | 28 | ||||
-rw-r--r-- | asm/intel64/int.h | 31 | ||||
-rw-r--r-- | asm/intel64/nop.h | 2 | ||||
-rw-r--r-- | asm/intel64/ret.cpp | 12 | ||||
-rw-r--r-- | asm/intel64/ret.h | 12 |
6 files changed, 90 insertions, 0 deletions
diff --git a/asm/intel64/all_ops.h b/asm/intel64/all_ops.h new file mode 100644 index 0000000..83b654b --- /dev/null +++ b/asm/intel64/all_ops.h @@ -0,0 +1,5 @@ +#pragma once + +#include "int.h" +#include "nop.h" +#include "ret.h" diff --git a/asm/intel64/int.cpp b/asm/intel64/int.cpp new file mode 100644 index 0000000..7b682ab --- /dev/null +++ b/asm/intel64/int.cpp @@ -0,0 +1,28 @@ +#include "int.h" + +#include <asm/assembler.h> + +Op_int::Op_int(AsmArgs& args) +{ + // At this point, the registration already ensured the number and types of args + + Immediate8 i {std::any_cast<Immediate8>(args[0])}; + + if (i.value() == 0) { // INT 0 + machine_code = { 0xCE }; + } else if (i.value() == 1) { // INT 1 + machine_code = { 0xF1 }; + } else if (i.value() == 3) { // INT 3 + machine_code = { 0xCC }; + } else { // INT <...> + machine_code = std::vector<uint8_t>{ 0xCD, i.value() }; + } +} + +namespace { + +bool registered { registerOp(mangleName<Immediate8>("int"), [](AsmArgs& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_int>(args); + }) }; + +} diff --git a/asm/intel64/int.h b/asm/intel64/int.h new file mode 100644 index 0000000..7bd60c8 --- /dev/null +++ b/asm/intel64/int.h @@ -0,0 +1,31 @@ +// Interrupt + +#pragma once + +#include <asm/assembler.h> + +class Op_int: public Op +{ +public: + Op_int(AsmArgs& args); + +public: + std::vector<uint8_t> getCode() override + { + return machine_code; + } + + size_t size() override + { + return machine_code.size(); + } + + bool optimize() override ///< returns true if changed + { + return false; + } + +protected: + std::vector<uint8_t> machine_code; +}; + diff --git a/asm/intel64/nop.h b/asm/intel64/nop.h index 72d6d1b..233b2ef 100644 --- a/asm/intel64/nop.h +++ b/asm/intel64/nop.h @@ -1,3 +1,5 @@ +// No Operation + #pragma once #include <asm/chunk.h> diff --git a/asm/intel64/ret.cpp b/asm/intel64/ret.cpp new file mode 100644 index 0000000..cd9ddd4 --- /dev/null +++ b/asm/intel64/ret.cpp @@ -0,0 +1,12 @@ +#include "ret.h" + +#include <asm/assembler.h> + +namespace { + +bool registered { registerOp("ret", [](AsmArgs& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_ret>(); + }) }; + +} + diff --git a/asm/intel64/ret.h b/asm/intel64/ret.h new file mode 100644 index 0000000..7e7f68c --- /dev/null +++ b/asm/intel64/ret.h @@ -0,0 +1,12 @@ +// Return from procedure + +#pragma once + +#include <asm/chunk.h> + +class Op_ret: public OpSimple +{ +public: + Op_ret() : OpSimple({ 0xC3 }) {} // near return; TODO: far return is 0xCB +}; + |