diff options
Diffstat (limited to 'asm/intel64/sar.cpp')
| -rw-r--r-- | asm/intel64/sar.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/asm/intel64/sar.cpp b/asm/intel64/sar.cpp index fccd738..3ca8a86 100644 --- a/asm/intel64/sar.cpp +++ b/asm/intel64/sar.cpp @@ -15,17 +15,17 @@ Op_sar::Op_sar(const Asm::Args& args) if (args[0].type() == typeid(Asm::Args::Register8)) { // sar reg8, 1 machine_code = std::vector<uint8_t>{ 0xD0 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()); } else if (args[0].type() == typeid(Asm::Args::Register32)) { // sar reg32, 1 - machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()); + machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/7", std::any_cast<Asm::Args::Register32>(args[0]).name()); } else if (args[0].type() == typeid(Asm::Args::Register64)) { // sar reg64, 1 - machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()); + machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/7", std::any_cast<Asm::Args::Register64>(args[0]).name()); } } else { // general version >= 2 bits shift if (args[0].type() == typeid(Asm::Args::Register8)) { // sar reg8, imm8 machine_code = std::vector<uint8_t>{ 0xC0 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset; } else if (args[0].type() == typeid(Asm::Args::Register32)) { // sar reg32, imm8 - machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset; + machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/7", std::any_cast<Asm::Args::Register32>(args[0]).name()) + shift_offset; } else if (args[0].type() == typeid(Asm::Args::Register64)) { // sar reg64, imm8 - machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset; + machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/7", std::any_cast<Asm::Args::Register64>(args[0]).name()) + shift_offset; } } |