1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
|
#include "sar.h"
#include "codes.h"
#include <asm/assembler.h>
#include <asm/operators.h>
using namespace std::string_literals;
Op_sar::Op_sar(const Asm::Args& args)
{
if (args[1].type() == typeid(Asm::Args::Immediate8)) {
std::vector<uint8_t> shift_offset{std::any_cast<Asm::Args::Immediate8>(args[1]).getCode()};
if (shift_offset == std::vector<uint8_t>{ 0x01 }) { // 1 bit version is shorter
if (args[0].type() == typeid(Asm::Args::Register8)) { // sar reg8, 1
machine_code = std::vector<uint8_t>{ 0xD0 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register32)) { // sar reg32, 1
machine_code = std::vector<uint8_t>{ 0xD1 } + ModRM("/7", std::any_cast<Asm::Args::Register32>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register64)) { // sar reg64, 1
machine_code = REX("W") + std::vector<uint8_t>{ 0xD1 } + ModRM("/7", std::any_cast<Asm::Args::Register64>(args[0]).name());
}
} else { // general version >= 2 bits shift
if (args[0].type() == typeid(Asm::Args::Register8)) { // sar reg8, imm8
machine_code = std::vector<uint8_t>{ 0xC0 } + ModRM("/7", std::any_cast<Asm::Args::Register8>(args[0]).name()) + shift_offset;
} else if (args[0].type() == typeid(Asm::Args::Register32)) { // sar reg32, imm8
machine_code = std::vector<uint8_t>{ 0xC1 } + ModRM("/7", std::any_cast<Asm::Args::Register32>(args[0]).name()) + shift_offset;
} else if (args[0].type() == typeid(Asm::Args::Register64)) { // sar reg64, imm8
machine_code = REX("W") + std::vector<uint8_t>{ 0xC1 } + ModRM("/7", std::any_cast<Asm::Args::Register64>(args[0]).name()) + shift_offset;
}
}
} else {
throw std::runtime_error("Unimplemented: sar "s + args[0].type().name() + " "s + args[1].type().name());
}
}
namespace {
bool registered {
registerOp(mangleName<Asm::Args::Register8, Asm::Args::Immediate8>("sar"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_sar>(args);
}) &&
registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate8>("sar"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_sar>(args);
}) &&
registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate8>("sar"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_sar>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem8Ptr64, Asm::Args::Immediate8>("sar"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_sar>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem32Ptr64, Asm::Args::Immediate8>("sar"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_sar>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate8>("sar"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_sar>(args);
})
};
}
|
