Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-11-28 | Implemented MOVSX - Move With Sign-Extension | Roland Reichwein | |
2020-11-28 | Implemented SETcc - Set Byte On Condition | Roland Reichwein | |
2020-11-28 | Implemented CMOVcc - Conditional Move | Roland Reichwein | |
2020-11-27 | Added CMP | Roland Reichwein | |
2020-11-18 | Implemented asm or | Roland Reichwein | |
2020-11-18 | Added Asm ops | Roland Reichwein | |
2020-11-13 | Added push and pop | Roland Reichwein | |
2020-11-13 | Add system tests, implement syscall | Roland Reichwein | |
2020-11-13 | Added intel sub, div, idiv | Roland Reichwein | |
2020-11-10 | Implemented dec, mul, imul | Roland Reichwein | |
2020-11-09 | Implement inc instruction, support 64 bit regs | Roland Reichwein | |
2020-10-17 | Add ret and int | Roland Reichwein | |