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#include "add.h"
#include "codes.h"
#include <asm/assembler.h>
#include <asm/operators.h>
using namespace std::string_literals;
Op_add::Op_add(const Asm::Args& args)
{
if (args[0].type() == typeid(Asm::Args::Register32) &&
std::any_cast<Asm::Args::Register32>(args[0]).name() == "eax" &&
args[1].type() == typeid(Asm::Args::Immediate32))
{ // add eax, imm32 (before "add reg32, imm32"! It's shorter.)
machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
} else if (args[0].type() == typeid(Asm::Args::Register32) &&
args[1].type() == typeid(Asm::Args::Immediate32))
{ // add reg32, imm32
machine_code = std::vector<uint8_t>{ 0x81 } + ModRM("/0", std::any_cast<Asm::Args::Register32>(args[0]).name()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
} else if (args[0].type() == typeid(Asm::Args::Register64) &&
std::any_cast<Asm::Args::Register64>(args[0]).name() == "rax" &&
args[1].type() == typeid(Asm::Args::Immediate32))
{ // add rax, imm32
machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
} else if (args[0].type() == typeid(Asm::Args::Register8) && args[1].type() == typeid(Asm::Args::Register8)) { // add reg8, reg8
machine_code = std::vector<uint8_t>{ 0x00 } + ModRM(std::any_cast<Asm::Args::Register8>(args[1]).name(), std::any_cast<Asm::Args::Register8>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Register32)) { // add reg32, reg32
machine_code = std::vector<uint8_t>{ 0x01 } + ModRM(std::any_cast<Asm::Args::Register32>(args[1]).name(), std::any_cast<Asm::Args::Register32>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Register64)) { // add reg64, reg64
machine_code = REX("W") + std::vector<uint8_t>{ 0x01 } + ModRM(std::any_cast<Asm::Args::Register64>(args[1]).name(), std::any_cast<Asm::Args::Register64>(args[0]).name());
} else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem32Ptr64)) { // add reg32, [reg64]
machine_code = std::vector<uint8_t>{ 0x03 } + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), std::any_cast<Asm::Args::Mem32Ptr64>(args[1]).reg());
} else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem64Ptr64)) { // add reg64, [reg64]
machine_code = REX("W") + std::vector<uint8_t>{ 0x03 } + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Mem64Ptr64>(args[1]).reg());
} else if (args[0].type() == typeid(Asm::Args::Mem8Ptr64) && args[1].type() == typeid(Asm::Args::Immediate8)) { // add [reg64], imm8
machine_code = std::vector<uint8_t>{ 0x80 } + ModRM("/0", std::any_cast<Asm::Args::Mem8Ptr64>(args[0]).reg()) + std::any_cast<Asm::Args::Immediate8>(args[1]).getCode();
} else if (args[0].type() == typeid(Asm::Args::Mem32Ptr64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // add [reg64], imm32
machine_code = std::vector<uint8_t>{ 0x81 } + ModRM("/0", std::any_cast<Asm::Args::Mem32Ptr64>(args[0]).reg()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
} else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Immediate32)) { // add qword ptr [reg64], imm32 (sign-extended)
machine_code = REX("W") + std::vector<uint8_t>{ 0x81 } + ModRM("/0", std::any_cast<Asm::Args::Mem64Ptr64>(args[0]).reg()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
} else if (args[0].type() == typeid(Asm::Args::Mem64Ptr64) && args[1].type() == typeid(Asm::Args::Immediate64)) { // add qword ptr [reg64], imm32 (sign-extended) - reduce imm64 to imm32!
Asm::Args::Immediate32 imm32{std::any_cast<Asm::Args::Immediate64>(args[1])};
machine_code = REX("W") + std::vector<uint8_t>{ 0x81 } + ModRM("/0", std::any_cast<Asm::Args::Mem64Ptr64>(args[0]).reg()) + imm32.getCode();
} else {
throw std::runtime_error("Unimplemented: add "s + args[0].type().name() + " "s + args[1].type().name());
}
}
namespace {
bool registered {
registerOp(mangleName<Asm::Args::Register32, Asm::Args::Immediate32>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate32>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Register8, Asm::Args::Register8>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Register32, Asm::Args::Register32>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Register64, Asm::Args::Register64>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem32Ptr64>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem64Ptr64>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem8Ptr64, Asm::Args::Immediate8>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem32Ptr64, Asm::Args::Immediate32>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate32>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
}) &&
registerOp(mangleName<Asm::Args::Mem64Ptr64, Asm::Args::Immediate64>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{ // automatically converted to 32-bit (sign extended) if small enough. Intel doesn't support ADD ..., imm64
return std::make_shared<Op_add>(args);
})
};
}
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