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author | Roland Reichwein <mail@reichwein.it> | 2020-11-27 22:51:50 +0100 |
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committer | Roland Reichwein <mail@reichwein.it> | 2020-11-27 22:51:50 +0100 |
commit | 541a2dffdcb02063f71d21af22aebbd293c9e49f (patch) | |
tree | bf061c9af91d814fc9888c26ef4c34c0b8fa87d8 /asm/intel64/encode.cpp | |
parent | f9885f48fc968c4122f2ed231a7a48938cc7206c (diff) |
Added CMP
Diffstat (limited to 'asm/intel64/encode.cpp')
-rw-r--r-- | asm/intel64/encode.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/asm/intel64/encode.cpp b/asm/intel64/encode.cpp index 0d7eacb..388639d 100644 --- a/asm/intel64/encode.cpp +++ b/asm/intel64/encode.cpp @@ -225,6 +225,7 @@ void Asm::toMachineCode(const FlowGraph::Graph& graph, Segment& segment) segment.push_back(makeStoreValue(operands[0], graph)); } else if (op.type() == FlowGraph::UnaryOperationType::LogicalNot) { segment.push_back(makeLoadValue(operands[1], graph)); + // TODO: cmp eax, 0 \n sete al \n movsx eax, al segment.append(parseAsm("bsr eax")); // ZF=1 iff eax=0 segment.append(parseAsm("lahf")); // ZF in AH bit 6 segment.append(parseAsm("shr eax, 14")); // ZF in eax bit 0 |