diff options
author | Roland Reichwein <mail@reichwein.it> | 2020-10-17 17:37:50 +0200 |
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committer | Roland Reichwein <mail@reichwein.it> | 2020-10-17 17:37:50 +0200 |
commit | 7b49d17f90f26394a116348befb5edcdffcedcb6 (patch) | |
tree | c32e76a9bea5851bfac92708fa626373573e4f06 /asm/intel64/int.cpp | |
parent | f86999e137f43372236f2dccd1fe3572a85c0dcd (diff) |
Add ret and int
Diffstat (limited to 'asm/intel64/int.cpp')
-rw-r--r-- | asm/intel64/int.cpp | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/asm/intel64/int.cpp b/asm/intel64/int.cpp new file mode 100644 index 0000000..7b682ab --- /dev/null +++ b/asm/intel64/int.cpp @@ -0,0 +1,28 @@ +#include "int.h" + +#include <asm/assembler.h> + +Op_int::Op_int(AsmArgs& args) +{ + // At this point, the registration already ensured the number and types of args + + Immediate8 i {std::any_cast<Immediate8>(args[0])}; + + if (i.value() == 0) { // INT 0 + machine_code = { 0xCE }; + } else if (i.value() == 1) { // INT 1 + machine_code = { 0xF1 }; + } else if (i.value() == 3) { // INT 3 + machine_code = { 0xCC }; + } else { // INT <...> + machine_code = std::vector<uint8_t>{ 0xCD, i.value() }; + } +} + +namespace { + +bool registered { registerOp(mangleName<Immediate8>("int"), [](AsmArgs& args) -> std::shared_ptr<Op>{ + return std::make_shared<Op_int>(args); + }) }; + +} |