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-rw-r--r--asm/intel64/add.cpp18
1 files changed, 18 insertions, 0 deletions
diff --git a/asm/intel64/add.cpp b/asm/intel64/add.cpp
index 236436c..957c27f 100644
--- a/asm/intel64/add.cpp
+++ b/asm/intel64/add.cpp
@@ -14,15 +14,26 @@ Op_add::Op_add(const Asm::Args& args)
args[1].type() == typeid(Asm::Args::Immediate32))
{ // add eax, imm32 (before "add reg32, imm32"! It's shorter.)
machine_code = std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+
} else if (args[0].type() == typeid(Asm::Args::Register32) &&
args[1].type() == typeid(Asm::Args::Immediate32))
+
{ // add reg32, imm32
machine_code = std::vector<uint8_t>{ 0x81 } + ModRM("/0", std::any_cast<Asm::Args::Register32>(args[0]).name()) + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+
} else if (args[0].type() == typeid(Asm::Args::Register64) &&
std::any_cast<Asm::Args::Register64>(args[0]).name() == "rax" &&
args[1].type() == typeid(Asm::Args::Immediate32))
+
{ // add rax, imm32
machine_code = REX("W") + std::vector<uint8_t>{ 0x05 } + std::any_cast<Asm::Args::Immediate32>(args[1]).getCode();
+
+ } else if (args[0].type() == typeid(Asm::Args::Register32) && args[1].type() == typeid(Asm::Args::Mem32Ptr64)) { // add reg32, [reg64]
+ machine_code = std::vector<uint8_t>{ 0x03 } + ModRM(std::any_cast<Asm::Args::Register32>(args[0]).name(), std::any_cast<Asm::Args::Mem32Ptr64>(args[1]).reg());
+
+ } else if (args[0].type() == typeid(Asm::Args::Register64) && args[1].type() == typeid(Asm::Args::Mem64Ptr64)) { // add reg64, [reg64]
+ machine_code = REX("W") + std::vector<uint8_t>{ 0x03 } + ModRM(std::any_cast<Asm::Args::Register64>(args[0]).name(), std::any_cast<Asm::Args::Mem64Ptr64>(args[1]).reg());
+
} else {
throw std::runtime_error("Unimplemented: add "s + args[0].type().name() + " "s + args[1].type().name());
}
@@ -36,7 +47,14 @@ bool registered {
}) &&
registerOp(mangleName<Asm::Args::Register64, Asm::Args::Immediate32>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
return std::make_shared<Op_add>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Register32, Asm::Args::Mem32Ptr64>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_add>(args);
+ }) &&
+ registerOp(mangleName<Asm::Args::Register64, Asm::Args::Mem64Ptr64>("add"), [](const Asm::Args& args) -> std::shared_ptr<Op>{
+ return std::make_shared<Op_add>(args);
})
};
}
+